| 摘要 |
An apparatus for controlling a write voltage of a semiconductor memory is provided to improve the performance of the semiconductor memory by reducing write cycle time while satisfying low power condition. A first data line receives data from the outside. A second data line is for transmitting data of the first data line to a cell region. A third data line is for transmitting inverted data of the first data line data to the cell region. A first driving unit(100) drives the second data line to have the same data level as the first data line using a first driving voltage. A first voltage control unit(200) supplies a second driving voltage to the second data line for a predetermined time according to a control signal and the data level of the first data line. A second driving unit(300) drives the third data line to transmit the inverted data using the first driving voltage. A second voltage control unit(400) supplies the second driving voltage to the third data line according to the inverted data and the control signal.
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