| 摘要 |
A parallel monitor circuit having a simple circuit configuration, in which a voltage divider circuit can be formed with resistors having the same resistance value, includes plural capacitors are connected in series, and a bypass device of each of parallel monitor circuits is connected in parallel with each capacitor. Plural voltages Va different from one another by a constant voltage are sequentially outputted from a digital-to-analog converter, and the voltages Va are inputted to plural parallel monitor circuits. When a charging voltage is higher than a monitor voltage determined by the voltage Va, each capacitor discharges through the bypass device, and the capacitor is kept at a predetermined monitor voltage.
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