发明名称 CIRCUIT AND METHOD FOR EVALUATION OVERLOAD CONDITION IN FLYBACK CONVERTER
摘要 A circuit and a method for evaluating a load condition in a flyback converter are disclosed. A first current source is used for providing a preset current ISUM equal to a sum of the off current value IOFF and the blanking current value ILEB to charge a first capacitor, and a second current source is used for providing a reference current IREF to charge a second capacitor. A comparator receives a voltage applied on the first capacitor at its positive input end and a voltage applied on the second capacitor at its negative input end. The output current transmitted to the load by the flyback converter is varied to the change of the preset current ISUM, as such the load condition is detected by the comparison result generated by the comparator.
申请公布号 US2016178671(A1) 申请公布日期 2016.06.23
申请号 US201514788340 申请日期 2015.06.30
申请人 Alpha and Omega Semiconductor (Cayman) Ltd. 发明人 Chen Yu-Ming;Cheng Jung-Pei;Huang Pei-Lun
分类号 G01R19/165;G01R31/00;H02M3/335 主分类号 G01R19/165
代理机构 代理人
主权项 1. A circuit for evaluating a load condition in a flyback converter comprises: a detection module detecting a primary current flowing through a sensing resistor connecting in series with a primary winding, wherein the detection module captures an off current value IOFF flowing through the sensing resistor when a main switch driven by a control signal for controlling on or off of the primary winding is turned off, and a blanking current value ILEB flowing through the sensing resistor when an active state of a leading edge blanking signal for shielding an initial spike of the primary current ends; a first current source providing a preset current ISUM related to a sum of the off current value IOFF and the blanking current value ILEB; a second current source providing a reference current; a first capacitor having a capacitance C11 charged by the first current source and a second capacitor having a capacitance C12 charged by the second current source; and a comparator having a positive input end receiving a voltage of the first capacitor and a negative input end receiving a voltage of the second capacitor, wherein a comparison result generated by the comparator provides the load condition when the preset current ISUM varies due to an output current transmitted to the load by the flyback converter varies.
地址 Sunnyvale CA US