发明名称 Apparatus and method for refreshing a flash memory unit
摘要 In a Flash memory unit, the storage of a logic signal in the memory cells is determined by performing a READ operation. The NORMAL READ operation requires that the floating gate store an amount of charge QNR above which a logic "0" is identified and below which a logic "1" is identified as being stored in the memory cell. A second level of charge QTR stored on the floating gate is used in a TEST READ operation. The stored charge QTR is greater than the stored charge QNR, but less than the charge stored on the floating gate as the result of a WRITE operation. The result of a TEST READ operation is compared with a NORMAL READ operation of a memory cell. When the logic state identified by the TEST READ operation and the NORMAL READ operation are not the same, the charge on the cell is determined to have decayed below a prescribed level and the memory cell is refreshed to the level that is present during a WRITE operation.
申请公布号 US2002110028(A1) 申请公布日期 2002.08.15
申请号 US20010021824 申请日期 2001.12.13
申请人 HASSAN MOHAMMED A.;CROSBY ROBERT M.;DUNN CLYDE F.;LOVE ANDREW M. 发明人 HASSAN MOHAMMED A.;CROSBY ROBERT M.;DUNN CLYDE F.;LOVE ANDREW M.
分类号 G11C16/34;(IPC1-7):G11C29/00 主分类号 G11C16/34
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