| 摘要 |
<p>Described is an apparatus and method for receiving and decoding a multiplexed data stream (404) organised in sectors (S1-S6,Sn) containing payload portions (205) individually destined for one of two or more decoders (DA,DB,DC). The apparatus is connected to a memory device (405) addressable in an address space (101,201). At least one of the decoders (DA,DB,DC) generates read and/or write addresses (416-418,611-613) from within a predetermined address range that is a true subset of the address space (101,201). For avoiding additional memory accesses caused by moving data already contained in the memory (405) into the decoder address range, the apparatus has an address translator (411,506,601,602,603) which translates the decoder addresses (416-418,611-613) into translated addresses (TDR,604,605,606) and uses the translated addresses for accessing (423) the memory device (405).</p> |
