发明名称 DRAM-BASED RECONFIGURABLE LOGIC
摘要 According to one general aspect, an apparatus may include a memory array comprising a plurality of memory sub-arrays. At least one of the sub-arrays may be arranged as a reconfigurable look-up table. The reconfigurable look-up table may include: a plurality of memory cells configured to store data, a local row decoder configured to activate one or more rows of memory cells based upon a set of input signals, a local line selector configured to select a sub-set of the row of memory cells based upon at least one input signal.
申请公布号 US2016173102(A1) 申请公布日期 2016.06.16
申请号 US201514814503 申请日期 2015.07.30
申请人 GAO Mingyu;ZHENG Hongzhong;MALLADI Krishna T. 发明人 GAO Mingyu;ZHENG Hongzhong;MALLADI Krishna T.
分类号 H03K19/177 主分类号 H03K19/177
代理机构 代理人
主权项 1. An apparatus comprising: a memory array comprising a plurality of memory sub-arrays; wherein at least one of the sub-arrays is arranged as a reconfigurable look-up table; wherein the reconfigurable look-up table comprises: a plurality of memory cells configured to store data,a local row decoder configured to activate one or more rows of memory cells based upon a set of input signals,a local line selector configured to select a sub-set of the row of memory cells based upon at least one input signal.
地址 Stanford CA US