发明名称 DELAY ADJUSTING CELL AND DELAY ADJUSTMENT METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To avoid deteriorating the accuracy of the delay adjustment. <P>SOLUTION: A delay adjusting cell for adjusting the delay time of signals in a semiconductor integrated circuit using a buffer comprises an input stage A for shaping input signals, a delay adjuster D for delaying the shaped signals utilizing the crosstalk delay, and an output stage E for shaping output signals from the delay adjuster D. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006156805(A) 申请公布日期 2006.06.15
申请号 JP20040346951 申请日期 2004.11.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAKAMURA KAZUHIRO;ISHINO MASAKI
分类号 H01L21/82;H01L21/822;H01L27/04;H03K5/13 主分类号 H01L21/82
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