发明名称 |
Systems and methods to enhance passivation integrity |
摘要 |
A semiconductor device having enhanced passivation integrity is disclosed. The device includes a substrate, a first layer, and a metal layer. The first layer is formed over the substrate. The first layer includes a via opening and a tapered portion proximate to the via opening. The metal layer is formed over the via opening and the tapered portion of the first layer. The metal layer is substantially free from gaps and voids. |
申请公布号 |
US9349688(B2) |
申请公布日期 |
2016.05.24 |
申请号 |
US201514791555 |
申请日期 |
2015.07.06 |
申请人 |
Taiwan Semiconductor Manufacturing Co., Ltd. |
发明人 |
Liao Ying-Chieh;Yang Han-Wei;Lai Chen-Chung;Kuo Kang-Min;Tien Bor-Zen |
分类号 |
H01L23/528;H01L23/00;H01L23/48;H01L21/768;H01L23/482;H01L23/522;H01L29/40;H01L23/31;H01L23/29 |
主分类号 |
H01L23/528 |
代理机构 |
Eschweiler & Associates, LLC |
代理人 |
Eschweiler & Associates, LLC |
主权项 |
1. A semiconductor device, comprising:
a substrate; a layer disposed over the substrate and including an opening extending through the layer, the opening being laterally bound by inner sidewalls of the layer; a plurality of bar or pillar structures arranged in a peripheral portion of the opening and collectively laterally surrounding a central portion of the opening; and a metal body extending through the opening to separate neighboring bar or pillar structures within the plurality of bar or pillar structures from one another. |
地址 |
Hsin-Chu TW |