| 发明名称 |
Bond Via Array for Thermal Conductivity |
| 摘要 |
In a microelectronic device, a substrate has first upper and lower surfaces. An integrated circuit die has second upper and lower surfaces. Interconnects couple the first upper surface of the substrate to the second lower surface of the integrated circuit die for electrical communication therebetween. A via array has proximal ends of wires thereof coupled to the second upper surface for conduction of heat away from the integrated circuit die. A molding material is disposed in the via array with distal ends of the wires of the via array extending at least to a superior surface of the molding material. |
| 申请公布号 |
US2016172268(A1) |
申请公布日期 |
2016.06.16 |
| 申请号 |
US201414567918 |
申请日期 |
2014.12.11 |
| 申请人 |
Invensas Corporation |
发明人 |
KATKAR Rajesh;Gao Guilian;Woychik Charles G.;Zohni Wael |
| 分类号 |
H01L23/367;H01L21/768;H01L23/538 |
主分类号 |
H01L23/367 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A microelectronic device, comprising:
a substrate having a first upper surface and a first lower surface; an integrated circuit die having a second upper surface and a second lower surface; interconnects coupling the first upper surface of the substrate to the second lower surface of the integrated circuit die for electrical communication therebetween; a via array having proximal ends of wires thereof coupled to the second upper surface for conduction of heat away from the integrated circuit die; and a molding material disposed in the via array with distal ends of the wires of the via array extending at least to a superior surface of the molding material. |
| 地址 |
San Jose CA US |
