发明名称 |
High Speed Parallel Procesing Digita Path for SAR ADC |
摘要 |
The analog-to-digital for converter (ADC) for converting an analog value into a digital equivalent using a parallel digital data path is disclosed. In one example embodiment, the ADC includes a switched capacitor DAC having an input to receive an analog value via analog sample and hold circuit. A comparator is coupled to the switched capacitor DAC. A successive approximation register (SAR) is coupled to the comparator. A plurality of logic blocks is coupled to the SAR. A plurality of thermometric encoders is coupled to the associated plurality of logic blocks. A plurality of MUXs is coupled to the associated plurality of thermometric encoders and the comparator, wherein the plurality of MUXs having associated outputs that is coupled to the input of the switched capacitor DAC. |
申请公布号 |
US2009102694(A1) |
申请公布日期 |
2009.04.23 |
申请号 |
US20080254678 |
申请日期 |
2008.10.20 |
申请人 |
NITTALA SRIKANTH;GORBOLD JEREMY;MADHAVAN MAHESH |
发明人 |
NITTALA SRIKANTH;GORBOLD JEREMY;MADHAVAN MAHESH |
分类号 |
H03M1/34 |
主分类号 |
H03M1/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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