Skew management for PAM communication systems

摘要

The present invention is directed to communication systems. According to embodiments of the present invention, a communication system includes at least two communication lanes and a skew management module. The skew management module generates a control current based on output test patterns of the two communication lanes. The control current is integrated and compared to a reference voltage by a comparator, which generates an analog offset signal. A PLL of one of the communication lanes generates a corrected clock signal that is adjusted using the analog offset signal to remove or adjust the skew between the communication lanes. The corrected clock signal is used for output data. There are other embodiments as well.

主权项

1. A communication system comprising:
a first communication lane comprising a first phase lock loop (PLL) and a first pattern generator, the first communication lane being configured to output a first data segment, the first pattern generator being configured to generate a first predetermined pattern, the first PLL being configured to generate a first clock signal; a second communication lane comprising a second PLL and a second pattern generator, the second PLL being configured to provide a second clock signal, the second PLL comprising a sigma-delta modulator (SDM), the second communication lane being configured to output a second data segment, the second pattern generator being configured to generate a second predetermined pattern, the SDM being configured to generate a skew offset using an analog offset signal for the second clock signal; a pulse amplitude modulation (PAM) circuit being configured to align the first data segment and the second data segment and output a PAM signal; and a skew management circuit being configured to generate the analog offset signal, the skew management circuit comprising a phase frequency detector (PFD) and a charge pump and a comparator, the PFD being configured to generate a control current by comparing the first predetermined pattern and the second predetermined pattern, the charge pump being configured to store the control current and characterized by a control voltage, the comparator being configured to generate the analog offset signal by comparing the control voltage to a predetermined reference voltage.