发明名称 |
Single-trigger low-energy flip-flop circuit |
摘要 |
One embodiment of the present invention sets forth a technique for capturing and storing a level of an input signal using a single-trigger low-energy flip-flop circuit that is fully-static and insensitive to fabrication process variations. The single-trigger low-energy flip-flop circuit presents only three transistor gate loads to the clock signal and none of the internal nodes toggle when the input signal remains constant. The output signal Q is set or reset at the rising clock edge using a single-trigger sub-circuit. A set or reset may be armed while the clock signal is low, and the set or reset is triggered at the rising edge of the clock.
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申请公布号 |
US8436669(B2) |
申请公布日期 |
2013.05.07 |
申请号 |
US201113095641 |
申请日期 |
2011.04.27 |
申请人 |
ALBEN JONAH M.;DALLY WILLIAM J.;NVIDIA CORPORATION |
发明人 |
ALBEN JONAH M.;DALLY WILLIAM J. |
分类号 |
H03K3/00 |
主分类号 |
H03K3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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