Method and device for synchronisation of clocks of digital encoders and decoders

摘要

The method involves receiving a data frame including a data packet. The packet is decoded and written in a memory (23). The decoded data in the memory is read at a clock frequency of a decoder. Memory filling state is compared to a threshold, at a determined instant. Phase locking loop (18) of the decoder is corrected according to the comparison result. An independent claim is also included for a device for receiving digital signals.