| 发明名称 | Apparatus and method for detecting single flip-error in a complementary resistive memory | ||
| 摘要 | Described is an apparatus which comprises: a complementary resistive memory bit-cell; a first sense amplifier coupled to the complementary resistive memory bit-cell via access devices; a second sense amplifier coupled to the first sense amplifier and to the complementary resistive memory bit-cell via the access devices, wherein the second sense amplifier is operable to detect an error in the complementary resistive memory bit-cell. | ||
| 申请公布号 | US9529660(B2) | 申请公布日期 | 2016.12.27 |
| 申请号 | US201514637297 | 申请日期 | 2015.03.03 |
| 申请人 | Intel Corporation | 发明人 | Tomishima Shigeki;Augustine Charles;Wu Wei;Lu Shih-Lien L. |
| 分类号 | G11C11/44;G06F11/07;G11C13/00;G11C11/16 | 主分类号 | G11C11/44 |
| 代理机构 | Green, Howard & Mughal, LLP | 代理人 | Green, Howard & Mughal, LLP |
| 主权项 | 1. An apparatus comprising: a complementary resistive memory bit-cell; a first sense amplifier coupled to the complementary resistive memory bit-cell via access devices; and a second sense amplifier coupled to the first sense amplifier and to the complementary resistive memory bit-cell via the access devices, wherein the second sense amplifier is operable to detect an error in the complementary resistive memory bit-cell. | ||
| 地址 | Santa Clara CA US | ||