摘要 |
A PARALLEL INTERFERENCE (17) CANCELLATION RECEIVER THAT REDUCES IMPULSE RESPONSE INTEFERENCE USING A MODEL OF THE RECEIVED SIGNAL SIMILAR TO THAT USED IN BLOCK LINEAR EQUALIZED. BLOCK LINEAR EQUALIZERS COMPRISE DECORRELATING RECEIVERS, ZERO-FORCING RECEIVERS, MINIMUM MEAN SQUARE ERROR RECEIVERS AND THE LIKE. THE INVENTION COMPRISES AN INTERFERENCE COMPUTATION PROCESSOR FEEDBACK (43) LOOP FOR CORRECTING THE OUTPUT OF A DIRECT INTERFERENCE CANCELLER. THE M INTERATIVE PROCESS REMOVES INTERFERES FROM THE OUTPUT SYMBOLS OF A MATCHED-FILTER. THE PIC RECEIVER USES RECEIVED SIGNAL MODELS OF THE VARIOUS BLOCK LINEAR EQUALIZERS THAT DO NOT ASSUME THAT EACH SUBCHANNEL CONSISTS OF SEVERAL DISTINCT PATHS. THE RECEIVER ESTIMATES THE IMPULSE RESPONSE CHARACTERISTICS OF EACH SUBCHANNEL AS A WHOLE.(FIG 1)
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