发明名称 CLOCK PHASE SHIFT APPARATUS
摘要 PROBLEM TO BE SOLVED: To hardly cause PLL (Phase Locked Loop) lock failure in a clock phase shifting apparatus which shifts the phase of a clock by using a PLL circuit. SOLUTION: The clock phase shifting apparatus is provided with: a first-stage PLL circuit 201 which inputs an output clock C100 of a crystal oscillator 100; and a second-stage PLL circuit 202 which inputs an output clock C201 of the first-stage PLL circuit. Wherein an output clock C202 of the second-stage PLL circuit is inputted to the first-stage PLL circuit as an input clock to be compared with the output clock of the crystal oscillator, and the output clock C202 of the second-stage PLL circuit is extracted as an output clock to the outside. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008099097(A) 申请公布日期 2008.04.24
申请号 JP20060279988 申请日期 2006.10.13
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAGAI MASAKI;MASUHAMA KAZUO
分类号 H03L7/087;H03L7/199 主分类号 H03L7/087
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