RECEIVER, RECEPTION METHOD, FILTER CIRCUIT, AND CONTROL METHOD

摘要

PROBLEM TO BE SOLVED: To achieve a compact circuit that has a simple configuration and restrains power consumption while meeting respective specifications requested by a plurality of radio communication systems. SOLUTION: When a host controller provides application selection information indicating one application selected from a plurality of applications, a clock generation circuit 52, integrators 55-1Ito 55-nIand a variable digital filter 58Iin a path configuration at an ICH side, integrators 55-1Qto 55-nQand a variable digital filter 58Qin a path configuration at a QCH side are controlled according to a selected application in a control circuit 51. AΣΔquadrature demodulator is operated only by two clocks at frequencies Fcw and Fcw/N, which can be applied to a multistandard receiver. COPYRIGHT: (C)2008,JPO&INPIT