发明名称 REGULATOR CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the time until output is stabilized on start-up of a control-equipped regulator circuit. SOLUTION: This control-equipped regulator circuit is a circuit allowing an active state or a standby state to be changed over by a control signal EN, for outputting a stable output voltage Vo in the active state, and stopping main circuit operation in the standby state to save power. The regulator circuit is provided with a comparator 40 comparing a level of a divided voltage Vc on an input node N31 input to a differential amplifier circuit 30 and a level of a reference voltage Vt on an input node N21, is provided with NMOS 52 that is a switch element with comparator output as the control signal, and is provided with a resistor load 51 discharging stabilization capacity 61 of regulator output to GND. Thereby, an output stabilization time in time of regulator starting can be hastened. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008310616(A) 申请公布日期 2008.12.25
申请号 JP20070158246 申请日期 2007.06.15
申请人 OKI ELECTRIC IND CO LTD;OKI MICRO DESIGN CO LTD 发明人 NAKAJIKKOKU MASAHIKO
分类号 G05F1/56 主分类号 G05F1/56
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