METHOD AND APPARATUS FOR IMPLEMENTING AND MAINTAINING A STACK OF PREDICATE VALUES WITH STACK SYNCHRONIZATION INSTRUCTIONS IN AN OUT OF ORDER HARDWARE SOFTWARE CO-DESIGNED PROCESSOR
摘要
Embodiments of a method and apparatus for implementing and maintaining a stack of predicate values with stack synchronization instructions. In one embodiment the apparatus is an out of order hardware/software co-designed processor including instructions to explicitly manage the predicate register stack to maintain stack consistency across branches of executing that push a variable number of predicate values onto the predicate stack. In one embodiment the stack-based predicate register implementation enables early branch calculation and early branch misprediction recovery via early renaming of predicate registers.
申请公布号
WO2016099734(A1)
申请公布日期
2016.06.23
申请号
WO2015US60814
申请日期
2015.11.16
申请人
INTEL CORPORATION
发明人
COLLINS, JAMISON D.;IYER, JAYESH;WINKEL, SEBASTIAN;XEKALAKIS, POLYCHRONIS;CHEN, HOWARD H.;BRAUCH, RUPERT