发明名称 METHOD AND DEVICE FOR EXTRACTING CLOCK SIGNAL
摘要 PROBLEM TO BE SOLVED: To obtain a clock signal extracting device which operates stably and is small-sized. SOLUTION: Electric signals V1 to V4 of (f), Δf, f-Δf, and f+Δf (GHz) are generated, a light signal P1 of 2f is modulated with the electric signal V4 to generate a light signal P5 of f-Δf, which is photoelectrically converted to generate an electric signal V7; and the phase of the electric signal (frequency- divided clock signal) V1 is controlled so that the phase difference between the signals V7 and V3 is eliminated. An electric circuit which operates up to a frequency a half as high as the frequency of the light signal P1 can extract the frequency-divided clock signal V1.
申请公布号 JP2000183862(A) 申请公布日期 2000.06.30
申请号 JP19980352856 申请日期 1998.12.11
申请人 KANSAI ELECTRIC POWER CO INC:THE 发明人 AOMI YOSHIYUKI;YAMASHITA IKUO
分类号 H04B10/556;H04B10/07;H04L7/027 主分类号 H04B10/556
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