MEMORY DEVICE WITH COMBINED NON-VOLATILE MEMORY (NVM) AND VOLATILE MEMORY

摘要

The present disclosure provides embodiments for methods and memory devices. One embodiment of a memory device includes a first volatile memory cell having a first volatile access transistor with a current electrode coupled with a first volatile bit line; a first non-volatile memory cell having a first non-volatile access transistor with a current electrode coupled with a first non-volatile bit line; and a transfer circuit coupled between the first volatile bit line and the first non-volatile bit line. The transfer circuit is configured to: couple data latched from the first volatile bit line with the first non-volatile bit line during a store operation, and couple the first volatile bit line with the first non-volatile bit line during a restore operation.

主权项

1. A memory device comprising:
a first volatile memory cell having
a first volatile access transistor with a current electrode coupled with a first volatile bit line; a first non-volatile memory cell having
a first non-volatile access transistor with a current electrode coupled with a first non-volatile bit line; and a transfer circuit coupled between the first volatile bit line and the first non-volatile bit line, wherein
the transfer circuit is configured to:
couple data latched from the first volatile bit line with the first non-volatile bit line during a store operation, andcouple the first volatile bit line with the first non-volatile bit line during a restore operation.