| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor storage device, by which high speed and stable read-out operation is allowed without using a threshold voltage or resistance value in the middle of the program state and erase state. <P>SOLUTION: This semiconductor storage device is constituted of a memory cell M3, a plurality of reference cells M1, M2 furnished with at least one by one of a plurality of available states of the memory M3, a 1st presense circuit 11 for supplying current to the memory cell M1 to output a 1st output voltage corresponded to the storage state of the memory cell M1, a plurality of 2nd presense circuits 12, 13 for respectively supplying the current to the reference cells M1, M2 to respectively output 2nd output voltages corresponded to each storage state of the reference cells M1, M2, and a differential amplifier circuit. Further, this semiconductor storage device includes a sense amplifier 14 constituted so that the 2nd output voltage of the plurality of 2nd presense circuits 12, 13 are respectively supplied to divided each input by dividing one differential input stage in parallel to the same number as that of the reference cell and the 1st output voltage of the 1st presense circuit 11 can be supplied to another differential input stage. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
