| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of generating a final output enable signal corresponding to a CAS latency by measuring a degree of delay reflected with a delay locked loop to reflect it to a read command. <P>SOLUTION: This semiconductor memory device includes: the delay locked loop 310; a delay and delay time measuring means 330 to measure a degree of delay between a reference clock signal and a feedback clock signal in response to a lock completion information which is synchronized with an external clock signal and output it as a delay measurement value; and an output enable signal generation means 350 to delay a read command information which is synchronized with the external clock signal, by a delay degree between the reference signal and DLL clock signal and synchronizes the delayed read command information with the DLL clock signal by corresponding to the delay measurement value and the CAS latency information to generate the final output enable signal. <P>COPYRIGHT: (C)2010,JPO&INPIT |
