发明名称 SUBSTRATE COMPRISING STACKS OF INTERCONNECTS, INTERCONNECT ON SOLDER RESIST LAYER AND INTERCONNECT ON SIDE PORTION OF SUBSTRATE
摘要 An integrated circuit device that includes a package substrate and a die coupled to the package substrate. The package substrate includes at least one dielectric layer, a first stack of first interconnects in the at least one dielectric layer, and a second interconnect formed on at least one side portion of the at least one dielectric layer. The first stack of first interconnects is configured to provide a first electrical path for a non-ground reference signal, where the first stack of first interconnects is located along at least one side of the package substrate. The second interconnect is configured to provide a second electrical path for a ground reference signal.
申请公布号 US2016240463(A1) 申请公布日期 2016.08.18
申请号 US201514703290 申请日期 2015.05.04
申请人 QUALCOMM Incorporated 发明人 Jow Uei-Ming;Song Young Kyu;Lee Jong-Hoon;Zhang Xiaonan;Velez Mario Francisco
分类号 H01L23/498;H01L21/48;H01L23/00 主分类号 H01L23/498
代理机构 代理人
主权项 1. An integrated circuit device comprising: a die; and a package substrate coupled to the die, the package substrate comprising: at least one dielectric layer;a first stack of first interconnects in the at least one dielectric layer, the first stack of first interconnects configured to provide a first electrical path for a non-ground reference signal, wherein the first stack of first interconnects is located along at least one side of the package substrate; anda second interconnect formed on at least one side portion of the at least one dielectric layer, wherein the second interconnect is configured to provide a second electrical path for a ground reference signal.
地址 San Diego CA US