| 发明名称 | Memory structure with self-aligned floating and control gates and associated methods | ||
| 摘要 | A memory structure having at least substantially aligned floating and control gates. Such a memory structure can include a control gate material disposed between a first insulator layer and a second insulator layer, a floating gate material disposed between the first insulator layer and the second insulator layer and at least substantially aligned with the control gate material, the floating gate material including a metal region, and an interpoly dielectric (IPD) layer disposed between the control gate material and the floating gate material such that the IPD layer electrically isolates the control gate material from the floating gate material. | ||
| 申请公布号 | US9478643(B2) | 申请公布日期 | 2016.10.25 |
| 申请号 | US201314140215 | 申请日期 | 2013.12.24 |
| 申请人 | Intel Corporation | 发明人 | Hopkins John;Simsek-Ege Fatma A. |
| 分类号 | H01L29/788;H01L29/66;H01L29/423;H01L21/28;H01L27/115 | 主分类号 | H01L29/788 |
| 代理机构 | Thorpe North & Western, LLP | 代理人 | Thorpe North & Western, LLP |
| 主权项 | 1. A memory structure having at least substantially aligned floating and control gates, comprising: a control gate material disposed between a first insulator layer and a second insulator layer; a floating gate material disposed between, and in direct contact with, each of the first insulator layer and the second insulator layer and at least substantially aligned with the control gate material, the floating gate material including a metal region; an interpoly dielectric (IPD) layer disposed between the control gate material and the floating gate material such that the IPD layer electrically isolates the control gate material from the floating gate material. | ||
| 地址 | Santa Clara CA US | ||