| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory device having a small clock buffer in which low electric power can be achieved by controlling on/off of the small clock buffer. SOLUTION: The memory device is provided with a clock enable buffer which buffers a clock enable signal to output an internal clock enable signal, a clock enable controller which synchronizes the internal clock enable signal with a small clock signal to output a first signal and a second signal, a clock controller which receives the first signal and the second signal and outputs a clock buffer enable signal and a small clock buffer enable signal, a clock buffer which is driven in response to the clock buffer enable signal and buffers a clock to output a clock pulse, and a small clock buffer which is driven in response to the small clock buffer enable signal and buffers a clock to output a small clock signal. COPYRIGHT: (C)2008,JPO&INPIT
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