发明名称 TRANSISTOR TESTING CIRCUIT AND METHOD THEREOF, SEMICONDUCTOR MEMORY APPARATUS AND SEMICONDUCTOR APPARATUS
摘要 A transistor testing circuit for measuring a breakdown voltage of a transistor included in a semiconductor apparatus with high accuracy for each chip is provided. The transistor testing circuit is disposed on a semiconductor chip to measure the breakdown voltage of a MOS transistor. The transistor testing circuit includes: a voltage applying apparatus, a current detecting circuit, a current mirror voltage outputting circuit, and a comparator circuit. The voltage applying apparatus applies a predetermined testing voltage to at least one of a drain, a source, and a gate of the MOS transistor. When the testing voltage is applied, the current detecting circuit detects a current flowing from the MOS transistor to a load circuit. The current mirror voltage outputting circuit generates a mirror current corresponding to the detected current and outputs the same. The comparator circuit compares the mirror current with a predetermined reference current to output a comparison result signal.
申请公布号 US2016216313(A1) 申请公布日期 2016.07.28
申请号 US201514741463 申请日期 2015.06.17
申请人 Powerchip Technology Corporation 发明人 Ogawa Akira
分类号 G01R31/26 主分类号 G01R31/26
代理机构 代理人
主权项 1. A transistor testing circuit disposed on a semiconductor chip for measuring a breakdown voltage of a metal-oxide-semiconductor (MOS) transistor, the transistor testing circuit comprising: a voltage applying apparatus applying a predetermined testing voltage to at least one of a drain, a source, and a gate of the MOS transistor; a current detecting circuit detecting a detecting current flowing from the MOS transistor to a load circuit when the testing voltage is applied; and a current mirror voltage outputting circuit generating a mirror current corresponding to the detecting current and outputting the mirror current.
地址 Hsinchu TW