发明名称 |
Method to Improve Floating Gate Uniformity for Non-Volatile Memory Devices |
摘要 |
The present disclosure relates an integrated circuit (IC) for an embedded flash memory device. In some embodiments, the IC includes a memory array region and a boundary region surrounding the memory array region disposed over a semiconductor substrate. A hard mask is disposed at the memory array region comprising a plurality of discrete portions. The hard mask is disposed under a control dielectric layer of the memory array region. |
申请公布号 |
US2016225776(A1) |
申请公布日期 |
2016.08.04 |
申请号 |
US201514609575 |
申请日期 |
2015.01.30 |
申请人 |
Taiwan Semiconductor Manufacturing Co., Ltd. |
发明人 |
Chuang Harry-Hak-Lay;Huang Chin-Yi;Kao Ya-Chen |
分类号 |
H01L27/115;H01L21/3213;H01L21/321;H01L21/762;H01L29/06;H01L21/28 |
主分类号 |
H01L27/115 |
代理机构 |
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代理人 |
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主权项 |
1. An integrated circuit (IC), comprising:
a semiconductor substrate made up of a memory array region and a boundary region surrounding the memory array region; a plurality of shallow trench isolation (STI) regions disposed within the memory array region, wherein the STI regions have upper STI surfaces which are higher than a planar upper surface of the semiconductor substrate so as to define recesses between upper portions of neighboring STI regions; a plurality of floating gates filling the recesses between neighboring STI regions within the memory array region; a hard mask disposed on a first STI region of the plurality of the STI regions; and a control gate layer disposed over an upper surface of the floating gates and stepping upwards to extend over an edge of the hard mask over the first STI region. |
地址 |
Hsin-Chu TW |