| 摘要 |
A circuit for the generation of a high ramp voltage for the supply of voltage to a capacitive load, in particular a high voltage for the programming or erasure of at least one memory cell of a non-volatile memory, comprises floating-gate transistors as storage elements. This generation circuit comprises a P type load transistor connected by its source to the output of a voltage booster delivering a high direct and constant voltage (HIV), by its drain to the load, the high ramp voltage being available at this drain, and by its control gate to a control feedback circuit to control the load current. This circuit achieves automatic control over the slope of the high ramp voltage (Vpp). Application to the generation of a high ramp voltage whose slope is smaller than a critical slope and the maximum value is high.
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