发明名称 Redundant binary code converting circuit and multiplication circuit using same
摘要 A redundant binary code conversion circuit consists of first to third RBC conversion circuits 261 to 263. The circuit 261 consists of decoders 30 to 38 of the same construction, the circuit 262 consists of RBC 2-digit conversion circuits 40 to 47 of the same construction and the circuit 263 consists of decoders 50 to 58 of the same construction. The circuit 261, as an exception, converts RBC patterns '...TT011...'('T' is -1), '...110TT...', '...TT1...' and '...11T...' of n digits to RBC patterns '...T10T0T...', '...1T0101...', '...T10T...' and '...1T01...' of (n+1) digits, respectively, circuit 262 converts RBC patterns '...1T...' and '...T1...' to RBC patterns '...01...' and '...0T...', respectively, and circuit 263 converts RBC patterns '...10TT...' and '...T011...' to RBC patterns '...0101...' and '...0T0T...', respectively.
申请公布号 US5986587(A) 申请公布日期 1999.11.16
申请号 US19980069144 申请日期 1998.04.29
申请人 FUJITSU LIMITED 发明人 FUKUDA, HIDEAKI
分类号 G06F7/53;G06F7/52;G06F7/525;(IPC1-7):G06F7/52;H03M5/16 主分类号 G06F7/53
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