| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which is prevented from malfunctioning due to the delay of a data signal on a critical path. <P>SOLUTION: An op_fetch signal showing that an instruction is executed from a master 104, a ready signal showing the data reception of the instruction issued by the master 104, and showing that the next instruction is executable, and a clock clk1 signal supplied from a clock mask circuit 130 and a read data rdata1 from a memory 108 are input to an instruction lookahead circuit 120, and a cri_flag showing that an instruction passing a critical path 420 is predicted beforehand, and executed in future is output from the instruction lookahead circuit. Also, as prerequisite, when the instruction passes a critical path 420, the value of rdata1 connected to a second AND circuit 522 shows that the instruction code is a multiplication instruction "011". <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
