| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To inexpensively manufacture a semiconductor device having copper wiring on which a MIM capacitance element is formed. <P>SOLUTION: An additional interlayer film 26 is formed between a copper diffusion preventing film 14 on the copper wiring 22 and a lower electrode 27 of the MIM capacitance element, and the copper wiring 22 is disposed below the MIM capacitance element. Consequently, the reduction of the thickness of the copper diffusion preventing film 14 at a step formed accompanied by a step at a boundary between the copper wiring 22 and an interlayer insulating layer 13 caused by a Dishing phenomenon occurring when the copper wiring 22 is formed in a trench in the interlayer insulating layer 13 by a CMP method. It is thus possible to suppress a leakage current and hence improve an yield and to reduce a chip area for increasing an yield per wafer. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
