发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND TESTING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of improving an yield. <P>SOLUTION: In a test circuit 14, the predetermined information of a cutting position of a fuse circuit 18 is inputted, and in a testing process before the cutting of a fuse, the information of the cutting position is set on an internal state development section (timing control circuit 13 or power source circuit 15) for developing an internal state. In the internal state development section, the internal state (internal timing or internal potential) is self-developed on the basis of the information of the cutting position, and thereby the internal state before the cutting of the fuse and the internal state after the cutting of the fuse become equivalent, and deterioration in yield caused by a difference in the internal states before and after the cutting of the fuse is prevented. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009048668(A) 申请公布日期 2009.03.05
申请号 JP20070210748 申请日期 2007.08.13
申请人 FUJITSU MICROELECTRONICS LTD 发明人 ONO JUN;MORI IKU
分类号 G11C29/12;G01R31/28;G11C11/401;G11C16/02;G11C16/06 主分类号 G11C29/12
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