发明名称 EMBEDDED MEMORY AND POWER MANAGEMENT SUBPACKAGE
摘要 Embodiment of the present disclosure describe integrated circuit package assemblies that allow for relatively short connections between devices such as a processor and memory. In one embodiment, a package assembly includes a die embedded in a subpackage directly coupled to another die attached to the subpackage. In some embodiments the subpackage may also contain power management devices. In some embodiments the die embedded in the subpackage and/or the power management device may overlap, or be located in, a region defined by the die coupled to the subpackage such that they are located between the die coupled to the subpackage and a substrate underlying the subpackage. Other embodiments may be described and/or claimed.
申请公布号 US2016197065(A1) 申请公布日期 2016.07.07
申请号 US201615068262 申请日期 2016.03.11
申请人 Intel Corporation 发明人 Guzek John S.;Mallik Debendra;Oster Sasha N.;McIntosh Timothy E.
分类号 H01L25/18;H01L23/367;H01L23/00;H01L23/538;H01L25/065;H01L23/31;H01L23/48 主分类号 H01L25/18
代理机构 代理人
主权项 1. A package assembly comprising: a subpackage with a first side and a second side disposed opposite to the first side, wherein the subpackage a power management device;one or more package-level interconnect contacts disposed on the first side of the subpackage; anda first die, the first die with a first side and a second side disposed opposite to the first side, the first side of the first die disposed between the second side of the first die and the first side of the subpackage; and a second die with a first side and a second side disposed opposite to the first side, the first side of the second die coupled to the second side of the subpackage and electrically coupled to the second side of the first die.
地址 Santa Clara CA US