发明名称 FUSE LATCH CIRCUIT, SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY SYSTEM
摘要 A data storing fuse element unit includes a plurality of fuse elements, stores data in the respective fuse elements in a bit unit in accordance with presence and absence of cutting of fuse elements, and a latch circuit unit latches the stored data by the bit unit. A logic information storing fuse element unit stores logic information of whether output logic of the data stored in the fuse elements is to be inverted or not. A data selecting unit selects any one of data latched in the latch circuit unit and data with the output logic of the data latched in the latch circuit unit inverted in a logic inverting unit, in accordance with logic information of the logic information storing fuse element unit and outputs the data.
申请公布号 US2007217276(A1) 申请公布日期 2007.09.20
申请号 US20070687084 申请日期 2007.03.16
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SUGISAWA YOSHINORI
分类号 G11C17/18;G11C7/00;G11C17/00;G11C29/00 主分类号 G11C17/18
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