TESTING SOC WITH PORTABLE SCENARIO MODELS AND AT DIFFERENT LEVELS

摘要

A method for testing a system-on-a-chip (SoC) is described. The method includes parsing a file to determine functions to be performed components of the SoC. The method further includes receiving a desired output of the SoC and generating a test scenario model based on the desired output of the SoC. The test scenario model includes a plurality of module representations of the functions and includes one or more connections between two of the module representations. The desired output acts as a performance constraint for the test scenario model. The test scenario model further includes an input of the SoC that is generated based on the desired output, the module representations, and the one or more connections. The test scenario model includes a path from the input via the module representations and the connections to the desired output.

主权项

1. A method comprising:
receiving a computer file including multiple test scenario models, wherein each of the test scenario models includes one or more module representations, wherein any two adjacent ones of the module representations of one of the test scenario models are connected with each other via a connection, wherein each of the test scenario models has an input that is generated based on a desired output for each of the test scenario models, wherein the input is generated by back propagating the desired output via a corresponding one of the test scenario models, wherein one of the test scenario models is a driver scenario model and remaining ones of the test scenario models includes the driver scenario model; and applying the test scenario models to test a hardware stage and to test a software stage of a system-on-a chip (SoC).