| 发明名称 | Compound complex instruction set computer (CCISC) processor architecture | ||
| 摘要 | A processor system includes a multichannel memory operable to store data values and a program memory operable to store Compound CISC (CCISC) instructions. The processor system also includes a processor operable to execute a computer program assembled with at least a portion of the compound CCISC instructions, to retrieve a CCISC instruction from the program memory, to access at least two data values in the multichannel memory based on the executed computer program, and to operate on the at least two data values in the multichannel memory based on the CCISC instruction. The processor retrieves the CCISC instruction, accesses the at least two data values, and operates on the at least two data values during a same clock cycle. | ||
| 申请公布号 | US9405534(B2) | 申请公布日期 | 2016.08.02 |
| 申请号 | US201313746239 | 申请日期 | 2013.01.21 |
| 申请人 | Yap Tom | 发明人 | Yap Tom |
| 分类号 | G06F9/30 | 主分类号 | G06F9/30 |
| 代理机构 | Duft Bornsen Fettig, LLP | 代理人 | Duft Bornsen Fettig, LLP |
| 主权项 | 1. A processor system, comprising: a multichannel memory configured to store data values; a program memory configured to store Compound Complex Instruction Set Computer (CCISC) instructions; and a processor configured to execute a computer program assembled with at least a portion of the compound CCISC instructions, to retrieve a CCISC instruction from the program memory, to access at least two data values in the multichannel memory based on the executed computer program, and to operate on the at least two data values in the multichannel memory based on the CCISC instruction, wherein the processor retrieves the CCISC instruction, accesses the at least two data values, and performs and operation utilizing the at least two data values during a same clock cycle. | ||
| 地址 | Centennial CO US | ||