SEMICONDUCTOR MEMORY DEVICE AND BUS SYSTEM

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of reducing power consumption of an address decoder when an invalid address is entered, and a bus system. SOLUTION: A bus slave 20a is provided with an access control circuit 22 for generating an access invalid signal AI when it is determined that an address signal ADD is an invalid address based on upper addresses A16 to A19 of the address signal AD. The bus slave 20a is provided with a selector 23 for supplying a stop address SAD to an address decoder 27 according to the access invalid signal AI from the access invalid signal AI. COPYRIGHT: (C)2009,JPO&INPIT