发明名称 |
TECHNIQUES TO WAKE-UP DEPENDENT INSTRUCTIONS FOR BACK-TO-BACK ISSUE IN A MICROPROCESSOR |
摘要 |
Techniques are disclosed for back-to-back issue of instructions in a processor. A first instruction is stored in a queue position in an issue queue. The issue queue stores instructions in a corresponding queue position. The first instruction includes a target instruction tag and at least a source instruction tag. The target instruction tag is stored in a table storing a plurality of target instruction tags associated with a corresponding instruction. Each stored target instruction tag specifies a logical register that stores a target operand. Upon determining, based on the source instruction tag associated with the first instruction and the target instruction tag associated with a second instruction, that the first instruction is dependent on the second instruction, a pointer to the first instruction is associated with the second instruction. The pointer is used to wake up the first instruction upon issue of the second instruction. |
申请公布号 |
US2016378503(A1) |
申请公布日期 |
2016.12.29 |
申请号 |
US201514751730 |
申请日期 |
2015.06.26 |
申请人 |
International Business Machines Corporation |
发明人 |
BROWNSCHEIDLE Jeffrey C.;CHADHA Sundeep;DELANEY Maureen A.;NGUYEN Dung Q. |
分类号 |
G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
Armonk NY US |