发明名称 Nanotube semiconductor devices
摘要 Semiconductor devices includes a thin epitaxial layer (nanotube) formed on sidewalls of mesas formed in a semiconductor layer. In one embodiment, a semiconductor device includes a first epitaxial layer and a second epitaxial layer formed on mesas of the semiconductor layer. The thicknesses and doping concentrations of the first and second epitaxial layers and the mesa are selected to achieve charge balance in operation. In another embodiment, the semiconductor body is lightly doped and the thicknesses and doping concentrations of the first and second epitaxial layers are selected to achieve charge balance in operation.
申请公布号 US9349796(B2) 申请公布日期 2016.05.24
申请号 US201514965009 申请日期 2015.12.10
申请人 Alpha and Omega Semiconductor Incorporated 发明人 Yilmaz Hamza;Wang Xiaobin;Bhalla Anup;Chen John;Chang Hong
分类号 H01L29/74;H01L31/111;H01L27/095;H01L29/47;H01L29/812;H01L31/07;H01L31/108;H01L29/08;H01L29/78;H01L29/06;H01L29/36;H01L29/10;H01L29/417;H01L29/739;H01L29/872;H01L29/861;H01L29/423 主分类号 H01L29/74
代理机构 Van Pelt, Yi & James LLP 代理人 Van Pelt, Yi & James LLP
主权项 1. A semiconductor device comprising: a heavily doped semiconductor substrate of a first conductivity type; a semiconductor layer of a second conductivity type formed on the heavily doped semiconductor substrate, the semiconductor layer comprising a plurality of trenches formed therein, the trenches extending close to, up to, or into the semiconductor substrate, the trenches forming mesas in the semiconductor layer; a first epitaxial layer of the second conductivity type formed on sidewalls of the trenches, adjacent the mesas; a second epitaxial layer of the first conductivity type formed on the first epitaxial layer; a first dielectric layer formed in the remaining trenches, adjacent the second epitaxial layer, the first dielectric layer filling at least part of the trenches; a gate dielectric layer formed on the sidewalls of the trenches above the first dielectric layer; and a gate conductive layer formed in a first trench above the first dielectric layer and adjacent the gate dielectric layer, wherein the first epitaxial layer and the second epitaxial layer form adjacent doped regions along the sidewalls of the trenches, the second epitaxial layer having a first thickness and a first doping concentration and the first epitaxial layer and a mesa of the semiconductor layer together having a second thickness and a second average doping concentration, the first and second thicknesses and the first and second doping concentrations being selected to achieve charge balance in operation, wherein a product of the first thickness and the first doping concentration is substantially equal to one half of a product of the second thickness and the second average doping concentration.
地址 Sunnyvale CA US