发明名称 FACILITATING INCREASED PRECISION IN MIP-MAPPED STITCHED TEXTURES FOR GRAPHICS COMPUTING DEVICES
摘要 A mechanism is described for facilitating increased precision in large mip-mapped stitched textures for graphics computing devices. A method of embodiments, as described herein, includes detecting a stitched texture associated with a first frame of contents associated with an application, and a first region of interest in the stitched texture, where the stitched texture includes a mip-mapped stitched texture associated with multiple mip-levels in a mip-chain. The method may further include defining, at a first mip-level, a tile offset at a position within the first region of interest, where the first mip-level corresponds to the first frame. The method may further include creating or modifying a view of the stitched texture to specify the tile offset, and rendering the stitched texture as a normal texture with a full sub-texel precision.
申请公布号 US2016364900(A1) 申请公布日期 2016.12.15
申请号 US201514738700 申请日期 2015.06.12
申请人 INTEL CORPORATION 发明人 Seiler Larry
分类号 G06T15/04;G06T11/00 主分类号 G06T15/04
代理机构 代理人
主权项 1. An apparatus comprising: reception/detection logic to detect a stitched texture associated with a first frame of contents associated with an application, wherein the reception/detection logic is further to detect a first region of interest in the stitched texture, wherein the stitched texture includes a mip-mapped stitched texture associated with multiple mip-levels in a mip-chain; offset logic to define, at a first mip-level, a tile offset at a position within the first region of interest, wherein the first mip-level corresponds to the first frame; adjustment logic to create or modify a view of the stitched texture to specify the tile offset; and application/execution logic to render the stitched texture as a normal texture with a full sub-texel precision.
地址 SANTA CLARA CA US