发明名称 INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce a chip size and to reduce test time. SOLUTION: An integrated circuit includes: an external memory control circuit 11 that receives read data and outputs write data using a read command and a write command between an internal circuit 10 and an LSI tester 200; a test RAM 13 that stores read data written at slow speed from the LSI tester 200; a test circuit 15 that interprets a command issued from the external memory control circuit 11, provides the read data at high speed from the test RAM 13 to the external memory control circuit 11, when determining that the read data needs to be inputted to the external memory control circuit 11, and provides the write data outputted from the external memory control circuit 11 to the test RAM 13 at high speed, when determining that write data is outputted from the external memory control circuit 11; and a test circuit 14 that reads the write data, which is read in the test RAM 13, to the LSI tester 200. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008047243(A) 申请公布日期 2008.02.28
申请号 JP20060223281 申请日期 2006.08.18
申请人 FUJITSU LTD 发明人 ISHIKAWA KATSUYA;OOTSUKA TATSUSHI
分类号 G11C29/56;G01R31/28 主分类号 G11C29/56
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