发明名称 PHASE LOCKED LOOP AND DELAY LOCKED LOOP WITH CHOPPER STABILIZED PHASE OFFSET
摘要 A control circuit includes a phase frequency detector that receives a reference phase Phi<SUB>REF </SUB>(signal) as an input and a feedback phase Phi<SUB>FBK </SUB>(signal) as control feedback. A voltage controlled oscillator is in electrical communication with the phase frequency detector. The VCO provides an output and the feedback phase Phi<SUB>FBK </SUB>(signal). An auxiliary feedback loop receives error phase Phi<SUB>E </SUB>(signal) from each of the reference phase Phi<SUB>REF </SUB>(signal) and the feedback phase Phi<SUB>FBK </SUB>(signal). The auxiliary feedback loop provides an adjustment signal to the control circuit to correct for static phase offset.
申请公布号 US2008218274(A1) 申请公布日期 2008.09.11
申请号 US20070683800 申请日期 2007.03.08
申请人 INTEGRATED DEVICE TECHNOLOGY, INC. 发明人 CLEMENTI DANIEL M.
分类号 H03L7/00 主分类号 H03L7/00
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