发明名称 |
Methods of Manufacturing Semiconductor Devices Including Gate Pattern, Multi-Channel Active Pattern and Diffusion Layer |
摘要 |
A semiconductor device includes a gate pattern on a substrate, a multi-channel active pattern under the gate pattern to cross the gate pattern and having a first region not overlapping the gate pattern and a second region overlapping the gate pattern, a diffusion layer in the multi-channel active pattern along the outer periphery of the first region and including an impurity having a concentration, and a liner on the multi-channel active pattern, the liner extending on lateral surfaces of the first region and not extending on a top surface of the first region. Related fabrication methods are also described. |
申请公布号 |
US2016300932(A1) |
申请公布日期 |
2016.10.13 |
申请号 |
US201615187430 |
申请日期 |
2016.06.20 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Choi Kyung-In;KIM Gyeom;YOON Hong-Sik;KOO Bon-Young;KIM Wook-Je |
分类号 |
H01L29/66;H01L29/78 |
主分类号 |
H01L29/66 |
代理机构 |
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代理人 |
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主权项 |
1. A method for fabricating a semiconductor device comprising:
forming a multi-channel active pattern protruding from an isolation layer; forming a dummy gate pattern on the multi-channel active pattern, the dummy gate pattern overlapping a portion of the multi-channel active pattern; forming a pre-liner layer on a top surface of the multi-channel active pattern not overlapping the dummy gate pattern; forming an impurity supply layer on the multi-channel active pattern not overlapping the dummy gate pattern; forming a first diffusion layer in the multi-channel active pattern not overlapping the dummy gate pattern by performing a first thermal process on the impurity supply layer at a first temperature; and forming a second diffusion layer in the multi-channel active pattern along an outer periphery of the multi-channel active pattern not overlapping the dummy gate pattern by performing a second thermal process on the impurity supply layer at a second temperature. |
地址 |
Suwon-si KR |