发明名称 Method of manufacturing multi-layer circuit board and multi-layer circuit board manufactured by using the method
摘要 A method of manufacturing a multi-layer circuit board includes: forming a first circuit layer on a first surface of a first prepreg; stacking a second prepreg on a first surface of the first circuit layer; and forming at least one of a second or a third circuit layer on at least one of a first surface of the second prepreg and a second surface opposite of the first surface of the first prepreg, wherein, in the stacking of the first prepreg, the first prepreg and the second prepreg are semi-cured.
申请公布号 US9532466(B2) 申请公布日期 2016.12.27
申请号 US201213658870 申请日期 2012.10.24
申请人 HAESUNG DS CO., LTD. 发明人 Lee Sang-min;Kwon Soon-Chul
分类号 H05K3/10;H05K3/46;H05K1/02;H05K3/00 主分类号 H05K3/10
代理机构 Sughrue Mion, PLLC 代理人 Sughrue Mion, PLLC
主权项 1. A method of manufacturing a circuit board, the method comprising: forming a second conductive circuit layer on a first surface of a second prepreg, the second conductive circuit layer having a centerline being parallel to the first surface of the second prepreg and dividing the second conductive circuit layer into an upper portion and a lower portion opposite to the upper portion; stacking a first prepreg on a first surface of the second conductive circuit layer; and forming at least one of a first circuit layer and a third circuit layer on at least one of a first surface of the first prepreg and a second surface opposite of the first surface of the second prepreg, wherein, in the stacking the first prepreg, the first prepreg and the second prepreg are in a semi-cured state and the first prepreg and the second prepreg flow between patterns of the second conductive circuit layer in the semi-cured state, wherein in the stacking the first prepreg, the second conductive circuit layer submerged into each of the stacked first and second prepregs is heated so that the first prepreg forms a first recessed portion and the second prepreg forms a second recessed portion, wherein the upper portion of the second conductive circuit layer is disposed in the first recessed portion and the lower portion opposite to the first portion is disposed in the second recessed portion, and wherein the first prepreg and the second prepreg are symmetrically stacked with respect to the centerline of the second conductive circuit layer protruding into each of the first and second prepregs after the submersion of the second conductive circuit layer; wherein the centerline of the second conductive circuit layer passes through a conductive material of the second conductive circuit layer.
地址 Changwon-si KR