发明名称 |
PACKAGE SUBSTRATE AND METHOD OF MANUFACTURING THE SAME |
摘要 |
Package substrate and a method of manufacturing the same is disclosed. The package substrate includes an insulating layer having first circuit patterns embedded in a first surface of the insulating layer, and a protruded circuit pattern formed above at least one of the embedded first circuit patterns, wherein a width of the protruded circuit pattern is greater than a width of each of the embedded first circuit patterns. Accordingly, a flip chip and a wire bonding chip may be installed at the same time owing to an embedded structure of circuit pattern and a protruded structure of circuit pattern realized together on a surface where an electronic component is to be installed. Moreover, a fine circuit pattern may be formed, and a surface treatment layer may be selectively formed at desired portions without forming an additional seed layer for electroplating, thereby possibly simplifying manufacturing processes and saving manufacturing costs. |
申请公布号 |
US2016353568(A1) |
申请公布日期 |
2016.12.01 |
申请号 |
US201615088666 |
申请日期 |
2016.04.01 |
申请人 |
Samsung Electro-Mechanics Co., Ltd. |
发明人 |
LEE Dong-Uk;KIM Young-Gon;YOON Jin-Young |
分类号 |
H05K1/02;H05K3/46;H05K3/42;H05K1/11;H05K3/06 |
主分类号 |
H05K1/02 |
代理机构 |
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代理人 |
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主权项 |
1. A package substrate, comprising:
an insulating layer having first circuit patterns embedded in a first surface of the insulating layer; and a protruded circuit pattern formed above at least one of the embedded first circuit patterns, wherein a width of the protruded circuit pattern is greater than a width of each of the embedded first circuit patterns. |
地址 |
Suwon-si KR |