Shift register unit, GOA circuit, array substrate and display device

摘要

A shift register unit, a GOA circuit, an array substrate and a display device are provided. The shift register unit comprises an input module, a charging module, a reset module, a first switch module T1 and a second switch module T2. A output terminal of the input module is connected to gate line Gi through T1 and connected to gate line Gi+3 through T2, gates of T1 and T2 are connected to a first clock signal line and a second clock signal line having a phase difference of half of a cycle. The gate lines Gi−1 and Gi+2 are connected to the input terminal of the input module through the charging module; the gate lines Gi+1 and Gi+4 are connected to the input terminal and the output terminal of the input module through the reset module. One shift register unit is shared by two gate lines, which reduces the area occupied by the GOA circuit on the array substrate, and satisfies the requirement of narrow frames of the array substrate.

主权项

1. An shift register unit, comprising an input module, a charging module, a reset module, a first switch module and a second switch module, wherein
a output terminal of the input module is connected to an Ith gate line through the first switch module and connected to a (i+3)th gate line through the second switch module, a control terminal of the first switch module is connected to a first clock signal line and a control terminal of the second switch module is connected to a second clock signal line, and a phase difference between clock signals output from the first clock signal line and the second clock signal line is half of a cycle; a (i−1)th gate line and a (i+2)th gate line are connected to an input terminal of the input module through the charging module; a (i+1)th gate line and a (i+4)th gate line are connected to the input terminal and the output terminal of the input module through the reset module; and i is a natural number and i>2; wherein the first switch module is a first switch transistor and the control terminal of the first switch module is gate of the first switch transistor; the second switch module is a second switch transistor and the control terminal of the second switch module is gate of the second switch transistor; wherein the input module comprises a capacitor and an output switch transistor, two terminals of the capacitor are connected to gate and drain of the output switch transistor, respectively, and source of the output switch transistor is connected to a high level signal line; the gate of the output switch transistor is the input terminal of the input module and the drain of the output switch transistor is the output terminal of the input module.