发明名称 WIRING STRUCTURE, SEMICONDUCTOR DEVICE, AND THEIR MANUFACTURING METHODS
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a wiring structure and a semiconductor device in which the wiring capacity is reduced in circuits where the gaps between wires are narrow, and their manufacturing methods. <P>SOLUTION: The manufacturing method includes: a process of forming a conductive wiring layer 8; a process of forming a wiring pattern on the wiring layer 8; a process of forming an insulating wiring interlayer film 11 between wires 10A, 10B, 10C, and 10D of the wiring pattern; and a process of forming a plurality of vertical hole-shaped fine pores 14 in the wiring interlayer film 11 in the thickness direction of the wiring interlayer film 11. Further, the fine pores 14 can be formed by etching using a mask formed with nano particles 12 or a material containing the nano particles 12. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2008311585(A) 申请公布日期 2008.12.25
申请号 JP20070160342 申请日期 2007.06.18
申请人 ELPIDA MEMORY INC 发明人 KAWAKITA KEIZO
分类号 H01L21/768;H01L21/3065;H01L23/522 主分类号 H01L21/768
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