| 摘要 |
An array substrate (100) and a display panel (10). The array substrate (100) comprises a display area (110) and a non-display area (120) provided around the display area (110), wherein the non-display area (120) comprises a first non-display sub-area (121) provided on one side of the display area (110), with an integrated chip (1211) being provided within the first non-display sub-area (121), and the display area (110) is provided with: a plurality of data lines (111) provided along a first direction; a plurality of first wires (112) provided along a second direction; wherein the first wires (112) comprise scanning lines or common electrode lines; and a plurality of second wires (113); a first insulation layer (114) is provided between the first wires (112) and the second wires (113), and a plurality of through holes (1141) are provided on the first insulation layer (114); each of the first wires (112) is electrically connected to one end of the second wires (113) through a corresponding through hole (1141); and the other end of the second wires (113) and the data lines (111) are electrically connected to the integrated chip (1211). The array substrate (100) has a relatively narrow edge frame. |
