发明名称 INFORMATION PROCEING APPARATUS AND SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide an information processing technology capable of suppressing the occurrence of unnecessary cache mistake even in the case of performing a plurality of access processings of accessing the same cache line in parallel. SOLUTION: An output program generation part 303 generates a load cache instruction, a cache hit decision instruction and a cache mistake processing instruction to be performed according to the result of decision to be made according to the cache hit decision instruction with respect to a memory access instruction included in an internal expression program output by an input program analyzing part 302. When a plurality of memory access instructions in which the same cache lines of a cache memory may be accessed are included in the external expression program, the output program generation part 303 generates a mixing instruction to mix the decision results of decision to be made according to the cache hit decision instruction into one, and outputs an output program 103 including them. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009020696(A) 申请公布日期 2009.01.29
申请号 JP20070182619 申请日期 2007.07.11
申请人 TOSHIBA CORP 发明人 MAEDA SEIJI
分类号 G06F9/45;G06F9/34;G06F9/38;G06F12/08 主分类号 G06F9/45
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